Part Number Hot Search : 
PD7XX8 2SA136 LM2902DT RTL8188 89C61 EN2042 KU10N16 BTS432E2
Product Description
Full Text Search
 

To Download AEAT-86AD-LASC0 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  aeat-86ad 14/12 bit multi-turn encoder module with built-in controller data sheet description the aeat-86ad provides all functions as an optoelec - tronic mechanical unit in order to implement, with single turn absolute encoder, an absolute multi-turn encoder with a combined capacity of up to 30 bits at extended temperature. the unit consists of an led circuit board, a phototransis - tor (pt) circuit board, and gear train arranged in between the pcbs. the built-in controller combined positional information from single turn absolute encoder and multiturn absolute encoder. it provides control inputs and signal outputs to application end. the integrated rs-422 diferential line driver output and line receiver are for noise immunity in transmission line. specifcations the multi-turn unit is available in the following versions: ? 12-bit solid shaft with binary output code ? 14-bit solid shaft with binary output code ? 12-bit solid shaft with gray output code ? 14-bit solid shaft with gray output code features ? 16384 (14bits) and 4096 (12bits) revolution count ver - sions ? optical, absolute multi-turn assembly with max. ?55 mm and typical height 13.3 mm. ? operating temperatures of -40c to +125c ? mechanical coupling by means of gear wheels with module of 0.3 ? operating speeds up to 12,000 rpm ? a 2x4-pole pin strip for power supply and signal ? integrated rs422 line driver and receiver applications ? major component of multi-turn housed encoder ? cost efective solution for direct integration into oem systems ? revolution detection benefts ? no battery or capacitor required for number of revo - lution counting during power failure ? immediate position detection on power up
 package dimensions figure 1. package dimensions figure 2. pin confguration notes: 1. 3rd angle projection 2. dimensions are in millimeters 3. general tolerance: 0.05, unless specifed otherwise 1, s20 - a0n 2, s17 - a0p 3, s18 - a09n 4, s15 - a09p 5, s5 - stcal m1 - gn d m2 - d ata - m3 - d ata + m4 - vcc m5 - msbin v m6 - strobe m7 - srclk- m8 - srclk+ 1 2 3 5 s21 s22 s1 s2
3 general aeat-86ad multiturn encoder module is integrated with a controller. the controller provides data synchronization between single turn absolute encoder module (i.e. aeas- 7x00) and basic multiturn encoder module. its combines the serial data from both modules into combined ( n mt + n st ) bit resolution to application end. the most signifcant bit (msb) will always be sent frst to data+. with integrated rs422 line driver and receiver, the difer - ential data transmission is compatible with eia standard rs-422. srclk+ and srclk - srclk input pins are used to clocked out the serial out - puts data through the data pins. lapse time between words or subsequent data frame must be 40 s or longer for proper data transmission. data+ and data - data output pins provides positional information via synchronous serial interface, which consists of n mt bit of serial data from multiturn module and n st bit of serial data from single turn module. msbinv the msb can be inverted (counting direction) by using msbinv. strobe strobe output pin can be used to determine whether the data is locked or changing. it is high when date is locked, but low when data is changing. connection to aeas-7x00 besides vdda, vdd and gnd of aeas-7x00 need to be connected to the multiturn encoder module, data and control i/o pins also need to be connected and soldered, i.e. nsdout, n2scl, n2nsl and n2din note: n mt = resolution of multiturn module n st = resolution of single turn module block diagram and detailed description figure 3. block diagram
 recommended operating condition device selection guide 1 absolute maximum ratings 1, 2 notes: 1. for other options of multiturn encoder module, please refer to factory. notes: 1. internal hardware clock that is built into the module 2. as unique coded gear-wheels techniques are implemented to generate unambiguous positional information, the interactions between these high wear resistant gear wheels are subjected to mechanical wear and tear. notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. 2. exposure to absolute maximum rating conditions for extended periods may afect reliability. 3. this device meets the esd ratings of the iec61000-4-2 level 1 (2kv). part number resolution operating temperature (c) output code dc supply voltage (v) AEAT-86AD-LASC0 12 bit -40 to 125 binary +5.0 to +5.5 aeat-86ad-lasf0 14 bit -40 to 125 binary +5.0 to +5.5 aeat-86ad-lcsc0 12 bit -40 to 125 gray +5.0 to +5.5 aeat-86ad-lcsf0 14 bit -40 to 125 gray +5.0 to +5.5 parameter symbol limits units dc supply voltage v cc -0.3 to + 6.0 v input voltage v i -0.5 to +5.5 v output voltage v o -0.5 to +v cc +0.5 v relative air humidity (non-condensing) %rh 85 % encoder shaft speed s rpm max 12000 rpm storage temperature t stg -40 to 125 c parameter symbol values units notes dc supply voltage v cc +5.0 / +5.5 v ambient temperature t amb - 40 to +125 c hardware clock f hclk 16 mhz 1 ssi serial clock f srclk 0.5 to 4 mhz encoder shaft speed s rpm 10000 or below rpm 2
5 figure 4. timing characteristics of strobe, srclk and data dc characteristics dc characteristics over recommended operating range, typical at 5 c notes: 1. only applicable for strobe output. 2. only applicable for msbinv input. 3. rs-422 diferential line driver for data output. 4. rs-422 diferential line receiver for srclk input. timing characteristics timing characteristics over recommended operating range, typical at 5 c notes: 1. only applicable for msbinv input. 2. srclk low-time = 0.50/f srclk ; high-time = 0.50/f srclk . 3. refer to figure 4 for timing description. 4. valid data on falling edges of srclk with strobe is high. parameter symbol condition values units notes min typ. max output high voltage i oh i oh = -8ma 2.4 v 1 output low voltage i ol i oh = 8ma 0.4 v 1 input high voltage v ih 2 v 2 input low voltage v il 0.8 v 2 v cc supply current i cc 110 ma values parameter symbol condition min typ. max units notes input transition rise/fall time t r /t f 0.8v/2.0v 10 ns 1 srclk frequency f srclk 0.5 4 mhz 2 srclk low-time t lsrclk 110 ns srclk high-time t hsrclk 70 ns data latch time t latch 35 s 3 lapse time between words t lt 40 s 3, 4 ssi frame start ssi frame end srclk + data + strobe ms b mt msb-1 mt lsb mt lsb+1 mt ms b st msb-1 st lsb st lsb+1 st n mt bit multiturn n st bit single turn n mt -1 n mt (n mt +1) t latch t lt (n mt + n st )-1 (n mt + n st ) 1  3
 no. pin name description function notes pin out for test 1 a0n analog output a0 negative (- true dif ) 1 2 a0p analog output a0 positive (+true dif.) 1 3 a09n analog output a09 negative (-true dif.) 1 4 a09p analog output a09 positive (+true dif.) 1 5 stcal digital input do not use unnecessarily 1 pin out between st and mt s1 nc do not connect s2 korr digital-input do not connect s3 probe_on digital-input do not connect s4 pcl digital input positive edge do not connect s5 stcal digital input do not connect s6 msbinv digital-input do not connect s7 n2din digital input to be connect to aeas-7000 din 2 s8 n2nsl digital-input to be connect to aeas-7000 nsl 2 s9 n2scl digital-input positive edge shift-register clock to be connect to aeas-7000 scl 2 s10 n2dout digital output shift-register data out to be connect to aeas-7000 dout 2 s11 do digital output do not connect s12 dprobe digital output do not connect s13 vdd supply voltage +5v supply digital to aeas-7000 2, 3 s14 gnd ground for supply voltage gnd for 5v supply analog/digital 2, 3 s15 a09p analog output do not connect s16 gnd ground for supply voltage gnd for 5v supply analog/digital 2, 3 s17 a0p analog output do not connect s18 a09n analog output do not connect s19 vdda supply voltage +5v supply analog to aeas-7000 2, 3 s20 a0n analog output do not connect s21 lerr digital output do not connect s22 ledr analog output do not connect pin out between mt and external m1 gnd ground for supply voltage gnd for 5v supply analog/digital m2 data - digital output ssi data - m3 data + digital output ssi data + m4 vcc supply voltage +5v supply analog/digital m5 msbinv digital input 0= counting without inversion 1= counting with inversion m6 strobe digital output data latching m7 srclk - digital input shift-register clock - m8 srclk + digital input shift-register clock + pin description notes: 1. only use for test purposes. 2. refer to aeas-7000 datasheet for detailed pin description. 3. power supply and ground from multi-turn module to single turn module.
7 application note the encoder is mechanically fxed by means of holes in adapters, which accommodate m3 threads. the encoder has 2 adapters for attaching in a 3 x 120 and 4 x 90 arrange - ment. for details, please refer to the mechanical drawings in figure 5. the mechanical coupling of the encoder shaft is realised by means of gear opinion with a module of 0.3, 14 teeth. the zero positions of the coupling wheels are locked with a plastic plug for alignment to the single turn absolute encoder, with the coupling wheel being able to compensate for an angle error of about +/-7. plastic plug pinion, module 0.3, 14 teet h zero position of coupling wheel plastic plug is removed upon integration with gearwheel. figure 5. mechanical coupling with multiturn encoder module the electrical connection is realized by means of a 2x4 pin strip (1.27mm pitch), which is plugged into a corresponding female connector. the encoder is attached with a plastic plug that locks the ab - solute zero position. during the mating of the gear wheel and the encoder coupling wheel it may be necessary to align the teeth of the gears for proper matching. the plastic plug can be removed upon integration with the gear wheel.
ordering information available options: aeat-8 ad-lasc0 aeat-8 ad-lasf0 aeat-8 ad-lcsc0 aeat-8 ad-lcsf0 c - 1-bit resolution f - 1-bit resolution a - binary output cod e c - gray output code t - extended temperature, -0 to +15 c  - no cover, integrated with muic, solid shaft a e a t - 8  a d - l s for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies, pte. in the united states and other countries. data subject to change. copyright ? 2006 avago technologies pte. all rights reserved.. obsoletes 5989-3439en. av01-0254en - july 14, 2006


▲Up To Search▲   

 
Price & Availability of AEAT-86AD-LASC0

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X